S - Edit

Mentor S-Edit Schematic Editor

Tanner S-Edit schematic capture increases your design productivity while handling the most complex IC designs.  This powerful environment supports fast, 64-bit rendering and cross-probing between schematic, layout, and LVS reporting at net and device levels.

• Industry-standard support including tight SPICE simulation integration and waveform cross-probing
• Directly view operating point simulation results in the schematic
• Cross-probe between schematic, layout and LVS report with net/device highlighting
• Configurable schematic Electrical Rule Checks (ERC)
• Advanced array and bus support
• Integrated with Tanner L-Edit IC to speed the layout and ECO process
• Available for Windows and Linux

FEATURES

• Easy to use
  • Intuitive, with an easy learning curve that gets you up and running quickly

• Property callbacks and multiple views per cell
  • Including SPICE, schematic, Verilog, Verilog-A and Verilog-AMS views

• Industry-standard import and export support
  •  Export to SPICE, EDIF, Verilog, and VHDL
  • Import from OpenAccess, and EDIF, with automatic conversion of files from Mentor and other third-party tools